The present invention relates generally to a circuit module and more particularly to the wiring structure of a circuit module for adopting a stereoscopic wiring structure on a main board.
Data processing systems such as personal computers can require varying amounts of semiconductor memory. One method of allowing flexibility in the density of semiconductor memory used in a system is to provide a plurality of sockets or slots in which memory modules can be inserted. As the operating speed of such systems increase, memory modules are needed to operate at faster speeds. Data transfer operations to and from memory modules need to be increased while maintaining or improving memory density.
An example of a conventional memory module that can be used for a personal computer will now be illustrated. Referring to FIG. 14, a cross-sectional view of a conventional memory module and socket is set forth with conventional memory module designated by the general reference character 10C. The conventional memory module 10C and socket of FIG. 14 include a main board 20 upon which a main board bus 22 and main board control signal lines (not shown) are formed. The main board 20 includes a memory socket. The memory socket includes socket terminals 21 connected to the main board bus 22 and main board control signal lines. Conventional memory module 10C is inserted in the socket in such a manner as to form a T-type stub structure with respect to the main board bus 22 and main board signal lines.
Conventional memory module 10C has contact terminals 12 on each side of a wiring board 11 which connect to the contact terminals 12 so that conventional memory module 10C can receive and transmit signals from/to main board 20 respectively. A module bus 15 is formed upon wiring board 11 and is connected to contact terminals 12. Conventional memory module 10C includes a Dynamic Random Access Memory (DRAM) 13, which has lead terminals 18 connected to module bus 15.
Main board 20 will typically include a plurality of sockets in which memory modules can be inserted. The plurality of sockets are arranged so that they are connected electrically in a parallel fashion on the main board 20. A control clock (not shown) is typically used to synchronize command operations and data transfer to and from memory modules. When the frequency of the control clock is increased up to 100 MHz, the number of memory modules 10C that can be connected in parallel when using the T-type stub structure is limited to four. When the frequency of the control clock is 133 MHz or more, the number of memory modules 10C that can be connected in parallel when using the T-type stub structure is limited to two and the rate at which data can be read from or written to the memory modules is limited to approximately 200 Megabit per second per pin (Mbps/pin). These limitations can be due to limitations in signal transmissions caused by reflections and distortions due to impedance mismatches caused by the T-type stub structure.
As the operating speeds of personal computers increase and the bit density of semiconductor memory increases, speed and density requirements for memory modules increase. In order to better meet these demands, a memory module and socket structure in which a main board bus is branched at a contact terminal has been proposed in place of the T-type stub structure and is disclosed in Japanese Patent Application Laid-Open No. Hei 11-251539.
Referring now to FIG. 15, a cross-sectional view of a conventional memory module and socket is set forth with conventional memory module designated by the general reference character 10D. In the conventional memory module and socket of FIG. 15, main board bus 22 is discontinuous on main board 20 and connects to socket terminals 21. Socket terminals 21 are contacted with contact terminals 12, which are positioned on each side of wiring board 11. Contact terminals 12 on opposite sides of wiring board 11 are connected by a contact terminal through wiring 19. Contact terminal through wiring 19 is formed in a through hole that pierces printed wiring board 11. Each lead terminal 18 of DRAM 13 is connected to a respective contact terminal by module bus 15 which is a printed wiring layer formed on wiring board 11.
In Japanese Patent Application Laid-Open No. Hei 11-251539, it is proposed that with conventional memory module and socket of FIG. 15, limitations in signal transmissions caused by reflections and distortions due to impedance mismatches caused by the stub structure set forth is reduced and operating speeds of memory module 10D is improved. In such a case, the memory module 10D can be operated with a control clock frequency up to approximately 200 MHz and the rate at which data can be read from or written to the memory modules is limited to approximately 400 Mbps/pin.
In view of the above discussion, it would be desirable to provide a memory module having improved operating speeds over conventional approaches. It would also be desirable to improve operating speeds without reducing the number of modules allowed on a main board.
According to the present embodiments, a module includes integrated circuits (ICs) such as a memory attached to a side of a wiring board. The module can include contact terminals attached to opposing sides of the wiring board in order to make electrical contact at a socket connection on a main board. Wirings may be formed on each side of the wiring board to form signal paths from the contact terminals to pins or external terminals of ICs. Through wirings may provide signal paths between two wirings formed on opposite sides of the wiring board.
According to one aspect of the embodiments, a through wiring can be located at a distance from the contact terminals.
According to another aspect of the embodiments, a through wiring can be located near a pin or external terminal of an IC.
According to another aspect of the embodiments, a through wiring can be located farther from the contact terminals than at least one pin or external terminal of an IC.
According to another aspect of the embodiments, the module can include a buffer, receiving signals from contact terminals and providing outputs to be received by at least one IC on the module.
According to another aspect of the embodiments, wirings can provide signal paths between contact terminals and a buffer, a through wiring can provide signal paths between wirings on opposite sides of a wiring board.
According to another aspect of the embodiments, one wiring can provide a signal path from a contact terminal on one side of a wiring board to a pin or external terminal of an IC. Another wiring can provide a signal path from another contact terminal on an opposite side of a wiring board to a pin or external terminal of another IC. The two wirings can have portions arranged in parallel with each other. The two wirings can have a through wiring providing an signal path between them.
According to another aspect of the embodiments, the main board can include a main board wiring having a discontinuity at a socket or slot.
According to another aspect of the embodiments, a plurality of sockets can provide parallel connection between a plurality of modules.
According to another aspect of the embodiments, at least one IC can be a Random Access Memory.
According to another aspect of the embodiments, at least one IC can be a Double Data Rate Random Access Memory.
According to another aspect of the embodiments, at least one IC can be a Quadruple Data Rate Random Access Memory.
According to another aspect of the embodiments, selected wirings providing signal paths from contact terminals to an IC can be electrically connected to through wirings, while other wirings providing signal paths from contact terminals to an IC are not electrically connected to through wirings.
According to another aspect of the embodiments, at least one IC can be attached to a front side of a wiring board and at least one IC can be attached to a back side of the wiring board.